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Other measures to reduce PFC electromagnetic interference

Other measures to reduce PFC electromagnetic interference
In order to further reduce the electromagnetic interference, necessary improvements should be made to the circuit to meet the requirements of the power adapter.
1. Selection of PFC topology
In order to realize high power factor, high power efficiency and compact size, it is recommended to adopt single stage topology structure with high power factor when designing small and medium power PFC. The traditional two-stage topology (PFC boost +DC/DC converter) is difficult to meet the requirements.
Single-stage topology can save PFC booster converter, reduce the number of components, reduce the total cost of the system. With single-stage topology, the system will also be affected by some factors, such as high voltage energy storage on no secondary side and short holding time of output voltage. In addition, as the output ripple is higher, more low voltage output capacitance must be used to make it slower to respond to dynamic load. This is not a problem for LED lighting applications, because power adapters generally do not require dynamic load response times, and even if the output current includes ripple, the human eye only sees the light output when the average current passes through the LED.
2. Cut off the transmission path of interference
(1) increase the distance between interference sources (such as motors and relays) and PFC, isolate them with ground lines or add a shield to PFC.
(2) the circuit board shall be reasonably divided, and the strong signal, weak signal, digital signal and analog signal circuit shall be reasonably divided into regions.
(3) the ground wire of the power device should be grounded separately to reduce mutual interference. Position the power device as close to the edge of the board as possible.
3. Frequency jitter technology of PFC
The so-called frequency jitter is to control the switch frequency with a certain low frequency rate (for example, 250 times /s) change, can be the switch frequency integral limit in a very narrow band jitter. Since the switching frequency is constantly changing near the rated value f, there is no correlation between it and the high-order harmonic interference of fixed frequency f, so the use of frequency jitter signal can reduce the conduction noise of PFC.
When designing high-power PFC, switch power IC with frequency jitter function can be selected, for example, TOPSwitch-HX series monolithic switch power integrated circuit with maximum output power of 33wW, whose frequency jitter range is 5kHz(switching frequency is 132kHz) or ± 2.5khz (switching frequency is 66kHz). In contrast,TOPS witch-GX is a 4kHz(switching frequency 132kHz) or a 2kHz(switching frequency 66kHz). Increasing frequency jitter range can reduce EMI interference and cost of EMI filter.
4. Isolation technology
Isolation technology refers to the technology that separates the noise source from the signal line. Optical coupler is often used in PFC to realize the isolation of primary side and secondary side. When isolating the transmitted analog signal, a linear optical coupler should be selected, and its current transmission ratio (CTR) is close to a constant. In addition, high-frequency transformer isolation, relay isolation, wiring isolation and other technologies are often used
Choose the right pick up point
The power factor corrector has five kinds of ground lines: analog ground, digital ground, power ground, alternating ground (ground G) and shielded ground. The design of the whole machine circuit should be based on the technical conditions and the actual situation to determine whether the ground is floating or grounding, which ground wire should be used, select single point grounding or multi-point grounding.
6. Component selection
EMI filter with better performance can further reduce electromagnetic interference. In order to reduce the noise of components, metal film resistance and low noise active devices should be adopted as far as possible. In order to reduce the temperature drift, all components need to undergo high and low temperature aging treatment. If necessary, the temperature compensation circuit can be added.
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